Memory address prediction for data speculation

DOI10.1007/BFB0002857MaRDI QIDQ4537097zbMATH OpenFDO

Authors Antonio González, José González

Publication date 25 June 2002

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/BFB0002857

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Computing methodologies and applications (68U99)

Recommendations

• Predicting locality phases for dynamic memory optimization
• Return-address prediction in speculative multithreaded environments
• Reasoning about memory layouts
• Automated Technology for Verification and Analysis

Cited in

(6)

• Dynamic memory instruction bypassing
• Speculative pre-execution assisted by compiler (SPEAR)
• Using the first-level caches as filters to reduce the pollution caused by speculative memory references
• Return-address prediction in speculative multithreaded environments
• ARB: a hardware mechanism for dynamic reordering of memory references
• The performance potential of value and dependence prediction

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