scientific article; zbMATH DE number 1775528

MaRDI QIDQ4544357zbMATH OpenFDO

Authors K. Wayne Current

Publication date 4 August 2002

zbMATH Keywords

voltage-mode multiple valued logic static latch circuits

Mathematics Subject Classification ID

Symbolic computation and algebraic computation (68W30)

Cited in

(9)

• Low power high-speed multithreshold voltage CMOS bus architectures
• Influence of the driver and active load threshold voltage in design of pseudo-NMOS logic
• MANY-VALUED R-S MEMORY CIRCUITS
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• scientific article; zbMATH DE number 1866314 (Why is no real title available?)
• scientific article; zbMATH DE number 1905124 (Why is no real title available?)
• Multiple path switching device utilizing size-controlled nano-Schottky wrap gates for MDD-based logic circuits
• Quaternary regenerative CMOS logic circuits with high-impedance output state

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