Binary Adder Circuits of Asymptotically Minimum Depth, Linear Size, and Fan-Out Two

DOI10.1145/3147215zbMath1451.68105arXiv1503.08659OpenAlexW2963891047MaRDI QIDQ4554949

Sophie Spirkl, Stephan Held

Publication date: 12 November 2018

Published in: ACM Transactions on Algorithms (Search for Journal in Brave)

Full work available at URL: https://arxiv.org/abs/1503.08659

zbMATH Keywords

parallelismdepthfan-outcombinational complexitybinary additionadder circuit

Mathematics Subject Classification ID

Networks and circuits as models of computation; circuit complexity (68Q06)

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