A Radix-10 Digit-Recurrence Division Unit: Algorithm and Architecture

DOI10.1109/TC.2007.1038zbMATH Open1390.65183OpenAlexW2172058174MaRDI QIDQ4564166FDOQ4564166

Alberto Nannarelli, Tomas Lang

Publication date: 12 June 2018

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.2007.1038

Mathematics Subject Classification ID

Numerical algorithms for computer arithmetic, etc. (65Y04)

Cited In (5)

• A study of decimal left shifters for binary numbers
• Efficient ASIC and FPGA implementation of binary-coded decimal digit multipliers
• Decimal square root: algorithm and hardware implementation
• Fast Radix-10 Multiplication Using Redundant BCD Codes
• A radix-10 BKM algorithm for computing transcendentals on pocket computers

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