High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes

DOI10.1109/TC.2017.2706262zbMATH Open1390.65176OpenAlexW2615476531MaRDI QIDQ4567249FDOQ4567249

Authors: Xiaoping Cui, Wenwen Dong, Weiqiang Liu, Fabrizio Lombardi, Earl E. jun. Swartzlander 

Publication date: 27 June 2018

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.2017.2706262

Mathematics Subject Classification ID

Parallel numerical computation (65Y05) Numerical algorithms for computer arithmetic, etc. (65Y04)

Cited In (2)

• Improved Design of High-Performance Parallel Decimal Multipliers
• Fast Radix-10 Multiplication Using Redundant BCD Codes

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