A Memory-Efficient High-Throughput Architecture for Lifting-Based Multi-Level 2-D DWT

DOI10.1109/TSP.2013.2274640zbMATH Open1393.94266OpenAlexW2166555635MaRDI QIDQ4578769FDOQ4578769

Authors: Yusong Hu, Ching-Chuen Jong 

Publication date: 22 August 2018

Published in: IEEE Transactions on Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tsp.2013.2274640

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12) Numerical methods for wavelets (65T60)

Cited In (2)

• Efficient array architectures for multi-dimensional lifting-based discrete wavelet transforms
• Memory Efficient Modular VLSI Architecture for Highthroughput and Low-Latency Implementation of Multilevel Lifting 2-D DWT

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