Hardware Efficient Fast Parallel FIR Filter Structures Based on Iterated Short Convolution

DOI10.1109/TCSI.2004.832784MaRDI QIDQ4590296zbMATHOpenAlexFDO

Authors Chao Cheng, Keshab K. Parhi

Publication date 20 November 2017

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tcsi.2004.832784

Mathematics Subject Classification ID

Filtering in stochastic control theory (93E11) Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

Cited in

(3)

• High-performance 1-D and 2-D inverse DWT 5/3 filter architectures for efficient hardware implementation
• Derivation and analysis of fast bilinear algorithms for convolution
• On fast FIR filters implemented as tail-canceling IIR filters

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