| Publication | Date of Publication | Type |
|---|
| Probabilistic Spherical Detection and VLSI Implementation for Multiple-Antenna Systems | 2021-08-26 | Paper |
| A Pipelined FFT Architecture for Real-Valued Signals | 2021-08-26 | Paper |
| https://portal.mardi4nfdi.de/entity/Q5008332 | 2021-08-26 | Paper |
| Low-Latency Low-Complexity Architectures for Viterbi Decoders | 2021-08-26 | Paper |
| A Network-Efficient Nonbinary QC-LDPC Decoder Architecture | 2021-08-26 | Paper |
| FFT Architectures for Real-Valued Signals Based on Radix-$2^{3}$ and Radix-$2^{4}$ Algorithms | 2021-08-26 | Paper |
| Architectures for Recursive Digital Filters Using Stochastic Computing | 2019-02-08 | Paper |
| Early Stopping Criteria for Energy-Efficient Low-Latency Belief-Propagation Polar Code Decoders | 2018-08-22 | Paper |
| Low-Latency Sequential and Overlapped Architectures for Successive Cancellation Polar Decoder | 2018-08-22 | Paper |
| High-Speed Parallel Architectures for Linear Feedback Shift Registers | 2018-07-18 | Paper |
| Systematic design of original and modified Mastrovito multipliers for general irreducible polynomials | 2018-07-09 | Paper |
| A Low-Complexity Hybrid LDPC Code Encoder for IEEE 802.3an (10GBase-T) Ethernet | 2018-07-09 | Paper |
| High-Speed VLSI Implementation of 2-D Discrete Wavelet Transform | 2018-06-27 | Paper |
| Pipelined Parallel Decision-Feedback Decoders for High-Speed Ethernet Over Copper | 2018-06-12 | Paper |
| Overlapped Message Passing for Quasi-Cyclic Low-Density Parity Check Codes | 2017-11-20 | Paper |
| Hardware Efficient Fast Parallel FIR Filter Structures Based on Iterated Short Convolution | 2017-11-20 | Paper |
| Low-Cost Fast VLSI Algorithm for Discrete Fourier Transform | 2017-11-20 | Paper |
| Low- Cost Parallel FIR Filter Structures With 2-Stage Parallelism | 2017-11-20 | Paper |
| Hardware Efficient Fast DCT Based on Novel Cyclic Convolution Structures | 2017-10-30 | Paper |
| Joint<tex>$(3, k)$</tex>-Regular LDPC Code and Decoder/Encoder Design | 2017-09-08 | Paper |
| Hardware efficient fast computation of the discrete Fourier transform | 2006-10-25 | Paper |
| Interleaved trellis coded modulation and decoder optimizations for 10 gigabit ethernet over copper | 2006-10-25 | Paper |
| Models for architectural power and power grid noise analysis on data bus | 2006-09-29 | Paper |
| On the performance and implementation issues of interleaved single parity check turbo product codes | 2005-11-16 | Paper |
| P-CORDIC: A precomputation based rotation CORDIC algorithm | 2005-05-03 | Paper |
| Frequency spectrum based low-area low-power parallel FIR filter design | 2005-05-03 | Paper |
| Interleaved convolutional code and its Viterbi decoder architecture | 2005-05-03 | Paper |
| Low-complexity decoding of block turbo-coded system with antenna diversity | 2005-05-03 | Paper |
| An FPGA implementation of \((3,6)\)-regular low-density parity-check code decoder | 2004-11-19 | Paper |
| A fast radix-4 division algorithm and its architecture | 2003-09-10 | Paper |
| Relaxed annihilation-reordering look-ahead QRD-RLS adaptive filters | 2003-08-25 | Paper |
| Digit-serial complex-number multipliers on FPGAs | 2003-08-25 | Paper |
| A low power correlator for CDMA wireless systems | 2003-08-25 | Paper |
| Evaluation of CORDIC algorithms for FPGA design | 2002-12-15 | Paper |
| Performance-scalable array architectures for modular multiplication | 2002-12-15 | Paper |
| Power efficient folding of pipelined LMS adaptive filters with applications to wireline digital communications | 2001-02-06 | Paper |
| Design of data format converters using two-dimensional register allocation | 1999-03-07 | Paper |
| Generalized multiplication-free arithmetic codes | 1998-01-05 | Paper |
| A pipelined adaptive differential vector quantizer for low-power speech coding applications | 1994-02-07 | Paper |
| A pipelined adaptive lattice filter architecture | 1993-08-31 | Paper |
| Parallel adaptive decision feedback equalizers | 1993-08-31 | Paper |
| Pipeline interleaving and parallelism in recursive digital filters. I. Pipelining using scattered look-ahead and decomposition | 1989-01-01 | Paper |
| Pipeline interleaving and parallelism in recursive digital filters. II. Pipelined incremental block filtering | 1989-01-01 | Paper |
