Worst-case execution time analysis for many-core architectures with NoC
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Cited in
(5)- Real-time application mapping for many-cores using a limited migrative model
- Cache-conscious offline real-time task scheduling for multi-core processors
- scientific article; zbMATH DE number 7559346 (Why is no real title available?)
- Dynamic interference-sensitive run-time adaptation of time-triggered schedules
- Real-time analysis of priority-preemptive NoCs with arbitrary buffer sizes and router delays
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