On Proving Circuit Lower Bounds against the Polynomial-Time Hierarchy
DOI10.1137/S0097539703422716zbMATH Open1105.68041MaRDI QIDQ4651502FDOQ4651502
Authors: Jin-Yi Cai, Osamu Watanabe
Publication date: 21 February 2005
Published in: SIAM Journal on Computing (Search for Journal in Brave)
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- On solving hard problems by polynomial-size circuits
- On proving circuit lower bounds against the polynomial-time hierarchy: positive and negative results
- Feasibly constructive proofs of succinct weak circuit lower bounds
- Circuit lower bounds à la Kolmogorov
- Title not available (Why is that?)
- On Circuit-Size Complexity and the Low Hierarchy in NP
- Proving Circuit Lower Bounds in High Uniform Classes
- Title not available (Why is that?)
- Lower bounds: from circuits to QBF proof systems
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- Parity, circuits, and the polynomial-time hierarchy
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