High-Performance Interface Architectures for Cryptographic Hardware

DOI10.1007/3-540-39118-5_27MaRDI QIDQ5000250zbMATH OpenOpenAlexFDO

Authors David P. Anderson, P. Venkata Rangan

Publication date 10 July 2021

Published in Advances in cryptology -- EUROCRYPT '87. Workshop on the theory and application of cryptographic techniques, Amsterdam, Netherlands, April 13--15, 1987. Proceedings (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/3-540-39118-5_27

Mathematics Subject Classification ID

Cryptography (94A60) Computational methods for problems pertaining to information and communication theory (94-08)

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(8)

• scientific article; zbMATH DE number 2092644 (Why is no real title available?)
• ICEPOLE: High-Speed, Hardware-Oriented Authenticated Encryption
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• Security considerations in the design and implementation of a new DES chip
• Designing Low-Cost Cryptographic Hardware for Wired- or Wireless Point-to-Point Connections
• A fault-tolerant pipelined architecture for symmetric block ciphers

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