ICEPOLE: High-Speed, Hardware-Oriented Authenticated Encryption
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Publication:5265089
DOI10.1007/978-3-662-44709-3_22zbMATH Open1396.94092OpenAlexW1552079389WikidataQ131317854 ScholiaQ131317854MaRDI QIDQ5265089FDOQ5265089
Authors: Paweł Morawiecki, Kris Gaj, Ekawat Homsirikamol, Krystian Matusiewicz, Josef Pieprzyk, Marcin Rogawski, Marian Srebrny, M. Wójcik
Publication date: 21 July 2015
Published in: Advanced Information Systems Engineering (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-662-44709-3_22
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- scientific article; zbMATH DE number 1304287
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- Forgery Attacks on Round-Reduced ICEPOLE-128
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- Optimizing S-Box Implementations for Several Criteria Using SAT Solvers
- On the construction of hardware-friendly \(4\times4\) and \(5\times5\) S-boxes
- Efficient hardware accelerator for AEGIS-128 authenticated encryption
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