ICEPOLE: High-Speed, Hardware-Oriented Authenticated Encryption

DOI10.1007/978-3-662-44709-3_22MaRDI QIDQ5265089zbMATH OpenOpenAlexWikidataFDO

Authors Paweł Morawiecki, Kris Gaj, Ekawat Homsirikamol, Krystian Matusiewicz, Josef Pieprzyk, Marcin Rogawski, Marian Srebrny, M. Wójcik

Publication date 21 July 2015

Published in Advanced Information Systems Engineering (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-662-44709-3_22

zbMATH Keywords

authenticated encryption schemeauthenticated cipherICEPOLE

Mathematics Subject Classification ID

Cryptography (94A60) Authentication, digital signatures and secret sharing (94A62)

Recommendations

• Fast Software Encryption
• Efficient hardware accelerator for AEGIS-128 authenticated encryption
• AEGIS: a fast authenticated encryption algorithm
• Differential-linear cryptanalysis of ICEPOLE
• Accelerating Fully Homomorphic Encryption in Hardware
• High-Performance Interface Architectures for Cryptographic Hardware
• The design of the ICE encryption algorithm
• Helix: fast encryption and authentication in a single cryptographic primitive.
• scientific article; zbMATH DE number 1304287

Cited in

(8)

• Efficient hardware accelerator for AEGIS-128 authenticated encryption
• On the construction of hardware-friendly \(4\times4\) and \(5\times5\) S-boxes
• Helix: fast encryption and authentication in a single cryptographic primitive.
• Differential-linear cryptanalysis revisited
• Forgery Attacks on Round-Reduced ICEPOLE-128
• Optimizing S-Box Implementations for Several Criteria Using SAT Solvers
• Sp-AELM: sponge based authenticated encryption scheme for memory constrained devices
• Beyond conventional security in sponge-based authenticated encryption modes

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