Low-Energy Asynchronous Interleaver for Clockless Fully Parallel LDPC Decoding

DOI10.1109/TCSI.2011.2107271MaRDI QIDQ5010681zbMATH OpenFDO

Authors Naoya Onizawa, Vincent Gaudet, Takahiro Hanyu

Publication date 26 August 2021

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TCSI.2011.2107271

Mathematics Subject Classification ID

Decoding (94B35) Applications of design theory to circuits and networks (94C30)

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