Abelian logic gates

DOI10.1017/S0963548318000482zbMATH Open1433.68138arXiv1511.00422OpenAlexW2269722460WikidataQ128233940 ScholiaQ128233940MaRDI QIDQ5222545FDOQ5222545

Authors: A. E. Holroyd, Lionel Levine, Peter Winkler 

Publication date: 6 April 2020

Published in: Combinatorics, Probability and Computing (Search for Journal in Brave)

Abstract: An abelian processor is an automaton whose output is independent of the order of its inputs. Bond and Levine have proved that a network of abelian processors performs the same computation regardless of processing order (subject only to a halting condition). We prove that any finite abelian processor can be emulated by a network of certain very simple abelian processors, which we call gates. The most fundamental gate is a "toppler", which absorbs input particles until their number exceeds some given threshold, at which point it topples, emitting one particle and returning to its initial state. With the exception of an adder gate, which simply combines two streams of particles, each of our gates has only one input wire. Our results can be reformulated in terms of the functions computed by processors, and one consequence is that any increasing function from N^k to N^l that is the sum of a linear function and a periodic function can be expressed in terms of (possibly nested) sums of floors of quotients by integers.

Full work available at URL: https://arxiv.org/abs/1511.00422

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Mathematics Subject Classification ID

Formal languages and automata (68Q45) Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Networks and circuits as models of computation; circuit complexity (68Q06)

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Cited In (8)

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• Title not available (Why is that?)
• Interference-based logic gates
• Few Product Gates But Many Zeros
• Sorting via chip-firing
• Elementary gates for cartoon computation
• Abelian networks IV. Dynamics of nonhalting networks
• Sorting via chip-firing

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