Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs

DOI10.1109/TC.2010.237MaRDI QIDQ5280588zbMATH OpenFDO

Authors S. K. Lam, Thambipillai Srikanthan, Christopher T. Clarke

Publication date 27 July 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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Cited in

(1)

• Core Based Architecture to Speed Up Optimal Ate Pairing on FPGA Platform

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