Thread Relocation: A Runtime Architecture for Tolerating Hard Errors in Chip Multiprocessors

DOI10.1109/TC.2009.76MaRDI QIDQ5280768zbMATH OpenFDO

Authors Omer Khan, Sandip Kundu

Publication date 27 July 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TC.2009.76

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Reliability, testing and fault tolerance of networks and computer systems (68M15)

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