Computer Aided Verification
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Publication:5312939
DOI10.1007/B98490zbMATH Open1103.68611OpenAlexW4298302743MaRDI QIDQ5312939FDOQ5312939
Authors: Azadeh Farzan, Feng Chen, José Meseguer, Grigore Roşu 
Publication date: 25 August 2005
Published in: Lecture Notes in Computer Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/b98490
Recommendations
Specification and verification (program logics, model checking, etc.) (68Q60) Theory of software (68N99)
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- The rewriting logic semantics project: a progress report
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- Formalization and analysis of class loading in Java
- Twenty years of rewriting logic
- Memory representations in rewriting logic semantics definitions
- The rewriting logic semantics project
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- A rewriting logic approach to operational semantics
- Tools and Algorithms for the Construction and Analysis of Systems
- Algebraic Methodology and Software Technology
- K-Java: a complete semantics of Java
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- Computer Aided Verification
- How to Tackle Integer Weighted Automata Positivity
- Verifying hierarchical Ptolemy II discrete-event models using real-time maude
- Precise Set Sharing Analysis for Java-Style Programs
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- An operational semantics for object-oriented concepts based on the class hierarchy
- Verification of Java programs with interacting analysis plugins
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- Mechanising a type-safe model of multithreaded Java with a verified compiler
- JavaFAN
- Theorem Proving in Higher Order Logics
- Partial order reduction for rewriting semantics of programming languages
- An overview of the K semantic framework
- José Meseguer: scientist and friend extraordinaire
- Executable rewriting logic semantics of Orc and formal analysis of Orc programs
- A rewriting logic approach to operational semantics (extended abstract)
- Memory policy analysis for semantics specifications in Maude
- Sawja: static analysis workshop for Java
- The \textsf{tccp} interpreter
- Java-MaC: A run-time assurance approach for Java programs
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