Maurer computers for pipelined instruction processing

DOI10.1017/S0960129507006548MaRDI QIDQ5458071zbMATH OpenOpenAlexFDO

Authors J. A. Bergstra, C. A. Middelburg

Publication date 10 April 2008

Published in Mathematical Structures in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1017/s0960129507006548

zbMATH Keywords

micro-architectures

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

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Cites work

• scientific article; zbMATH DE number 4039251 (Why is no real title available?)
• scientific article; zbMATH DE number 53772 (Why is no real title available?)
• A Theory of Communicating Sequential Processes
• A Theory of Computer Instructions
• A theory of computer instructions
• Algebraic models of correctness for abstract pipelines.
• Algebraic models of microprocessors architecture and organisation
• Automata theory: Its past and future
• Combining programs and state machines
• Module algebra
• Predicative methodology
• Process Algebra
• Process algebra for synchronous communication
• Program algebra for sequential code
• Program algebra with unit instruction operators
• Splitting bisimulations and retrospective conditions
• Thread algebra for strategic interleaving

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(10)

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• Synchronous cooperation for explicit multi-threading
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• A thread calculus with molecular dynamics
• Simulating Turing machines on Maurer machines
• Thread algebra for noninterference
• On the operating unit size of load/store architectures
• On the expressiveness of single-pass instruction sequences
• scientific article; zbMATH DE number 5222378 (Why is no real title available?)

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