Maurer computers for pipelined instruction processing
DOI10.1017/S0960129507006548zbMATH Open1141.68010OpenAlexW2165072244MaRDI QIDQ5458071FDOQ5458071
C. A. Middelburg, J. A. Bergstra
Publication date: 10 April 2008
Published in: Mathematical Structures in Computer Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1017/s0960129507006548
Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)
Cites Work
- Process algebra for synchronous communication
- Title not available (Why is that?)
- A Theory of Communicating Sequential Processes
- Process Algebra
- Title not available (Why is that?)
- Module algebra
- Splitting bisimulations and retrospective conditions
- Program algebra for sequential code
- A Theory of Computer Instructions
- Combining programs and state machines
- Thread algebra for strategic interleaving
- Predicative methodology
- A theory of computer instructions
- Algebraic models of correctness for abstract pipelines.
- Algebraic models of microprocessors architecture and organisation
- Program algebra with unit instruction operators
- Automata theory: Its past and future
Cited In (9)
- Title not available (Why is that?)
- On the operating unit size of load/store architectures
- On the expressiveness of single-pass instruction sequences
- Title not available (Why is that?)
- Simulating Turing machines on Maurer machines
- Title not available (Why is that?)
- A thread calculus with molecular dynamics
- Thread algebra for noninterference
- Synchronous cooperation for explicit multi-threading
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