On the operating unit size of load/store architectures

DOI10.1017/S0960129509990314zbMATH Open1206.68114OpenAlexW2144055884MaRDI QIDQ3564342FDOQ3564342

J. A. Bergstra, C. A. Middelburg

Publication date: 2 June 2010

Published in: Mathematical Structures in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1017/s0960129509990314

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zbMATH Keywords

Maurer machines

Mathematics Subject Classification ID

Cites Work

• Title not available (Why is that?)
• Process Algebra
• Title not available (Why is that?)
• Program algebra for sequential code
• A Theory of Computer Instructions
• Combining programs and state machines
• Maurer computers for pipelined instruction processing
• A theory of computer instructions
• Automata theory: Its past and future

Cited In (2)

• Instruction sequence processing operators
• On the sizes of DPDAs, PDAs, LBAs

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