On the operating unit size of load/store architectures

DOI10.1017/S0960129509990314MaRDI QIDQ3564342zbMATH OpenOpenAlexFDO

Authors J. A. Bergstra, C. A. Middelburg

Publication date 2 June 2010

Published in Mathematical Structures in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1017/s0960129509990314

zbMATH Keywords

Maurer machines

Mathematics Subject Classification ID

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Cites work

• scientific article; zbMATH DE number 4039251 (Why is no real title available?)
• scientific article; zbMATH DE number 53772 (Why is no real title available?)
• A Theory of Computer Instructions
• A theory of computer instructions
• Automata theory: Its past and future
• Combining programs and state machines
• Maurer computers for pipelined instruction processing
• Process Algebra
• Program algebra for sequential code

Cited in

(2)

• Instruction sequence processing operators
• On the sizes of DPDAs, PDAs, LBAs

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