IMPLEMENTATION OF ZERO TREE WAVELET CODERS IN DSP PROCESSOR
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Publication:5692248
DOI10.1142/S0219691304000366zbMATH Open1101.68920MaRDI QIDQ5692248FDOQ5692248
Authors: S. Arivazhagan, D. Gnanadurai, J. R. Antony Vance, K. M. Sarojini, L. Ganesan
Publication date: 27 September 2005
Published in: International Journal of Wavelets, Multiresolution and Information Processing (Search for Journal in Brave)
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Cites Work
Cited In (6)
- Approaches to zerotree image and video coding on MIMD architectures
- Haar wavelet based processor scheme for image coding with low circuit complexity
- Wavelet kernels on a DSP: A comparison between lifting and filter banks for image coding
- The single-pass perceptual embedded zero-tree coding implementation on DSP
- TARGET TRACKING IN VIDEO SEQUENCES USING WAVELET TRANSFORM
- DSPs for image and video processing.
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