Exact and efficient verification of parameterized cache coherence protocols
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Publication:5897071
DOI10.1007/B93958zbMATH Open1179.68013OpenAlexW219731125MaRDI QIDQ5897071FDOQ5897071
Authors: Vineet Kahlon, E. Allen Emerson 
Publication date: 5 February 2010
Published in: Lecture Notes in Computer Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/b93958
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Specification and verification (program logics, model checking, etc.) (68Q60) Network protocols (68M12)
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- Formal Methods in Computer-Aided Design
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- Efficient methods for formally verifying safety properties of hierarchical cache coherence protocols
- A case study on parametric verification of failure detectors
- Specification and verification of concurrent programs through refinements
- Towards general and exact distributed invalidation
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- Parameterized model checking of rendezvous systems
- Verifying Parameterized taDOM+ Lock Managers
- Constraint-based verification of parameterized cache coherence protocols
- Parameterized model checking of networks of timed automata with Boolean guards
- An invariant-based approach to the verification of asynchronous parameterized networks
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- Verification, Model Checking, and Abstract Interpretation
- Deriving efficient cache coherence protocols through refinement
- Parameterized verification under TSO with data types
- Multi-parameterised compositional verification of safety properties
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- Correct Hardware Design and Verification Methods
- Model Checking Parameterized Systems
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