Formal Methods for Hardware Verification

DOI10.1007/11757283MaRDI QIDQ5899151zbMATH OpenOpenAlexFDO

Authors Nicola Bombieri, Franco Fummi, Graziano Pravadelli

Publication date 2 May 2007

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/11757283

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15) Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07)

Recommendations

• Dynamic and formal verification of embedded systems: A comparative survey
• Hardware/Software Co-Verification: Models and Methods
• An Embedded System's Design Verification Using Object-Oriented Simulation
• Verification of embedded systems based on interval analysis
• System-on-a-chip verification. Methodology and techniques

Cited in

(9)

• An Embedded System's Design Verification Using Object-Oriented Simulation
• A VHDL-based HW/SW cosimulation of communication systems
• Dynamic and formal verification of embedded systems: A comparative survey
• Verification of embedded systems based on interval analysis
• Compositional Reasoning for Hardware/Software Co-verification
• A mixed level simulation environment for stepwise RTOS software refinement
• Performance estimation for an EDA tool-based HW/SW co-verification environment
• Hardware/Software Co-Verification: Models and Methods
• scientific article; zbMATH DE number 2087300 (Why is no real title available?)

This page was built for publication: Formal Methods for Hardware Verification

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q5899151)