Formal Methods for Hardware Verification

DOI10.1007/11757283MaRDI QIDQ5899153zbMATH OpenOpenAlexFDO

Authors Koen Claessen, Jan-Willem Roorda

Publication date 2 May 2007

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/11757283

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07)

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Cited in

(8)

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• Automatic Refinement and Vacuity Detection for Symbolic Trajectory Evaluation
• On Bridging Simulation and Formal Verification
• A probabilistic and approximated approach to circuit-based formal verification
• Correct Hardware Design and Verification Methods
• scientific article; zbMATH DE number 1979544 (Why is no real title available?)
• SAT-based methods for sequential hardware equivalence verification without synchronization
• Static Analysis

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