DC gain analysis of scaled CMOS op amp in sub-100 nm technology nodes: A research based on channel length modulation effect

DOI10.1007/S12204-009-0613-2MaRDI QIDQ615254zbMATH OpenOpenAlexFDO

Authors Jia Cheng, Jianfei Jiang, Qi-Yu Cai

Publication date 5 January 2011

Published in Journal of Shanghai Jiaotong University (Science) (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s12204-009-0613-2

zbMATH Keywords

simulationmodelinganalog circuitscomplementary metal-oxide-semiconductor (CMOS) analog integrated circuitsoperational amplifierstechnology node

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

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Cited in

(1)

• Analysis and optimization of a novel biasing for constant-gain CMOS open-loop amplifiers

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