Quantum circuits for high-degree and half-multiplication for post-quantum analysis

DOI10.1007/978-981-97-1235-9_8MaRDI QIDQ6547862FDOQ6547862

Authors: Rini Wisnu Wardhani, Dedy Septono Catur Putranto, Howon Kim 

Publication date: 31 May 2024

zbMATH Keywords

quantumpost-quantum cryptographycorrelation power analysisToom-Cookhigh-degree and half-multiplication

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Cryptography (94A60) Computer security (68M25)

Cites Work

• Title not available (Why is that?)
• Fiat-Shamir with aborts: applications to lattice and factoring-based signatures
• The Fast Fourier Transform in a Finite Field
• Cryptographic Hardware and Embedded Systems - CHES 2004
• Space- and time-efficient polynomial multiplication
• A logarithmic-depth quantum carry-lookahead adder
• Time/Space Trade-Offs for Reversible Computation
• On the Minimum Computation Time of Functions
• Quantum circuits for \(\mathbb F_{2^n}\)-multiplication with subquadratic gate count
• Improved reversible and quantum circuits for Karatsuba-based integer multiplication
• Title not available (Why is that?)
• Towards Optimal Toom-Cook Multiplication for Univariate and Multivariate Polynomials in Characteristic 2 and 0

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