Chips on wafers, or packing rectangles into grids

DOI10.1016/J.COMGEO.2004.05.006zbMATH Open1066.65024OpenAlexW2155559020MaRDI QIDQ705545FDOQ705545

Authors Mattias Andersson, Joachim Gudmundsson, Christos Levcopoulos

Publication date 31 January 2005

Published in Computational Geometry (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/j.comgeo.2004.05.006

zbMATH Keywords

Computational geometryApproximation algorithmsPacking rectangles

Mathematics Subject Classification ID

Numerical aspects of computer graphics, image analysis, and computational geometry (65D18)

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Cites work

• scientific article; zbMATH DE number 3639144 (Why is no real title available?)
• scientific article; zbMATH DE number 1219584 (Why is no real title available?)
• scientific article; zbMATH DE number 1117902 (Why is no real title available?)
• scientific article; zbMATH DE number 1175962 (Why is no real title available?)
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• Finding minimum-cost flows by double scaling
• Network flows. Theory, algorithms, and applications.
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• Tafel Musik: Formatting algorithm of tables
• Theoretical Improvements in Algorithmic Efficiency for Network Flow Problems

Cited in

(2)

• Optimal wafer cutting in shuttle layout problems
• Chips on wafers (extended abstract)

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