Deadlock-freeness of hexagonal systolic arrays

DOI10.1016/J.IPL.2010.04.021zbMATH Open1234.68024OpenAlexW2006670027MaRDI QIDQ765473FDOQ765473

Authors: D. Kharzeev 

Publication date: 19 March 2012

Published in: Information Processing Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.ipl.2010.04.021

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zbMATH Keywords

parallelismparallel processingsystolic arraydeadlockRoscoe-Dathi method

Mathematics Subject Classification ID

Parallel algorithms in computer science (68W10) Network design and communication in computer systems (68M10)

Cites Work

• Title not available (Why is that?)
• The pursuit of deadlock freedom
• Title not available (Why is that?)
• Deadlock avoidance for systolic communication
• Title not available (Why is that?)

Cited In (1)

• Deadlock avoidance for systolic communication

Uses Software

• CSP-prover

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