Implementing a chaotic cryptosystem in a 64-bit embedded system by using multiple-precision arithmetic
DOI10.1007/S11071-019-04802-3zbMATH Open1437.94062OpenAlexW2912099576WikidataQ128417304 ScholiaQ128417304MaRDI QIDQ783495FDOQ783495
Authors: A. Flores-Vergara, E. E. García-Guerrero, E. Inzunza-González, O. R. López-Bonilla, Eduardo Rodríguez-Orozco, Jose R. Cárdenas-Valdez, Esteban Tlelo-Cuautle 
Publication date: 4 August 2020
Published in: Nonlinear Dynamics (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s11071-019-04802-3
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Cited In (8)
- A novel perturbation method to reduce the dynamical degradation of digital chaotic maps
- Randomness improvement of chaotic maps for image encryption in a wireless communication scheme using PIC-microcontroller via ZigBee channels
- A novel image encryption scheme based on pseudo-random coupled map lattices with hybrid elementary cellular automata
- Hardware Implementation of Chaos Based Cipher: Design of Embedded Systems for Security Applications
- A new DNA coding and hyperchaotic system based asymmetric image encryption algorithm
- Performance of finite precision on discrete chaotic map based on a feedback shift register
- Discrete Rössler oscillators: maps and their ensembles
- Adaptive chaotic maps and their application to pseudo-random numbers generation
Uses Software
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