An array architecture for computing two-dimensional discrete Hartley transforms
From MaRDI portal
Publication:804326
DOI10.1016/0045-7906(91)90020-ZzbMATH Open0727.68134OpenAlexW2077170442MaRDI QIDQ804326FDOQ804326
Authors: A. S. Dhar, S. Banerjee
Publication date: 1991
Published in: Computers and Electrical Engineering (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/0045-7906(91)90020-z
Recommendations
Cited In (4)
- A throughput maximised parallel architecture for 2D fast discrete Pascal transform
- Distributed memory parallel architecture based on modular linear arrays for 2-D separable transforms computation
- Algorithm for computing two-dimensional discrete Hartley transform of size pn×pn
- 2D grid architectures for the DFT and the 2D DFT
This page was built for publication: An array architecture for computing two-dimensional discrete Hartley transforms
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q804326)