S. Banerjee
From MaRDI portal
List of research outcomes
This list is not complete and representing at the moment only items from zbMATH Open and arXiv. We are working on additional sources - please check back here soon!
| Publication | Date of Publication | Type |
|---|---|---|
| scientific article; zbMATH DE number 7385661 (Why is no real title available?) | 2021-08-26 | Paper |
| An Efficient Constant Multiplier Architecture Based on Vertical-Horizontal Binary Common Sub-expression Elimination Algorithm for Reconfigurable FIR Filter Synthesis IEEE Transactions on Circuits and Systems I: Regular Papers | 2021-08-26 | Paper |
| A VLSI array architecture for realization of DFT, DHT, DCT and DST Signal Processing | 2002-03-03 | Paper |
| A VLSI array architecture for Hough transform Pattern Recognition | 2001-09-09 | Paper |
| An array architecture for computing two-dimensional discrete Hartley transforms Computers and Electrical Engineering | 1991-01-01 | Paper |
Research outcomes over time
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