Formal verification of the VAMP floating point unit
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Publication:816201
DOI10.1007/S10703-005-1613-YzbMATH Open1086.68518OpenAlexW2157753532MaRDI QIDQ816201FDOQ816201
Authors: Christian Jacobi, Christoph Berg
Publication date: 20 February 2006
Published in: Formal Methods in System Design (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10703-005-1613-y
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- On the design of IEEE compliant floating point units
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- Correct Hardware Design and Verification Methods
Cited In (13)
- Title not available (Why is that?)
- A formally verified floating-point implementation of the compact position reporting algorithm
- Finding normal binary floating-point factors efficiently
- A Mechanically Checked Proof of IEEE Compliance of the Floating Point Multiplication, Division and Square Root Algorithms of the AMD-K7™ Processor
- Counterexample- and simulation-guided floating-point loop invariant synthesis
- Title not available (Why is that?)
- FM 2005: Formal Methods
- Title not available (Why is that?)
- Title not available (Why is that?)
- Formal Verification of Transcendental Fixed- and Floating-point Algorithms using an Automatic Theorem Prover
- Title not available (Why is that?)
- Correct Hardware Design and Verification Methods
- Title not available (Why is that?)
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