Correct Hardware Design and Verification Methods

DOI10.1007/B93958zbMATH Open1179.68009OpenAlexW219731125MaRDI QIDQ5897057FDOQ5897057

Authors: Sven Beyer, Chris Jacobi, Daniel Kroening, Dirk C. Leinenbach, Wolfgang J. Paul 

Publication date: 5 February 2010

Published in: Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/b93958

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Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07)

Cited In (5)

• Balancing the load. Leveraging a semantics stack for systems verification
• Title not available (Why is that?)
• Formal verification of the VAMP floating point unit
• Formalization of fixed-point arithmetic in HOL
• Algebraic models of behaviour and correctness of SMT and CMT processors

Uses Software

• PVS

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