Formal memory models for the verification of low-level operating-system code
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Publication:835773
DOI10.1007/S10817-009-9122-0zbMATH Open1191.68178OpenAlexW2104622601MaRDI QIDQ835773FDOQ835773
Authors: Hendrik Tews, Marcus Völp, Tjark Weber
Publication date: 31 August 2009
Published in: Journal of Automated Reasoning (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10817-009-9122-0
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Cites Work
Cited In (21)
- Formal reasoning under cached address translation
- Formal Pervasive Verification of a Paging Mechanism
- Correct Hardware Design and Verification Methods
- Balancing the load. Leveraging a semantics stack for systems verification
- Formal verification of a C-like memory model and its uses for verifying program transformations
- Formal stystems specification. The RPC-memory specification case study
- A Unified Memory Model for Pointers
- System-level non-interference of constant-time cryptography. I: Model
- Operating system task management requirements layer modeling and verification based on Coq
- Mechanising a formal model of flash memory
- Toward compositional verification of interruptible OS kernels and device drivers
- Physical addressing on real hardware in Isabelle/HOL
- Program verification in the presence of cached address translation
- Compositional verification of a baby virtual memory manager
- Operating system verification---an overview
- Parametric verification of address space separation
- Formally verified implementation of an idealized model of virtualization
- Correct Hardware Design and Verification Methods
- A verified specification of TLSF memory management allocator using state monads
- Types, Maps and Separation Logic
- Effective Abstractions for Verification under Relaxed Memory Models
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