On the cost of ASIC hardware crackers: a SHA-1 case study

DOI10.1007/978-3-030-75539-3_27OpenAlexW3160754115MaRDI QIDQ826307FDOQ826307

Authors: A. Chattopadhyay, Mustafa Khairallah, Gaëtan Leurent, Zakaria Najm, Thomas Peyrin, Vesselin Velichkov 

Publication date: 20 December 2021

Full work available at URL: https://hal.inria.fr/hal-03529193/file/article.pdf

zbMATH Keywords

cryptanalysishash functionsbirthday problemASIC\texttt{SHA-1}

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Cryptography (94A60)

Cites Work

• Monte Carlo Methods for Index Computation (mod p)
• Parallel collision search with cryptanalytic applications
• Biclique Cryptanalysis of the Full AES
• Hash Functions and the (Amplified) Boomerang Attack
• New collision attacks on SHA-1 based on optimal joint local-collision analysis
• Cryptanalysis with COPACOBANA
• The \textsc{Simon} and \textsc{Speck} block ciphers on AVR 8-bit microcontrollers
• The first collision for full SHA-1
• From collisions to chosen-prefix collisions application to full SHA-1
• Freestart collision for full SHA-1
• Practical free-start collision attacks on 76-step SHA-1

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