New-age: A negative bias temperature instability-estimation framework for microarchitectural components

DOI10.1007/S10766-009-0104-YzbMATH Open1186.68083OpenAlexW2066959447MaRDI QIDQ839019FDOQ839019

Authors: Michael DeBole, Ramakrishnan Krishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan 

Publication date: 1 September 2009

Published in: International Journal of Parallel Programming (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10766-009-0104-y

Recommendations

• NBTI and power reduction using an input vector control and supply voltage assignment method
• NBTI-aware transient fault rate analysis method for logic circuit based on probability voltage transfer characteristics
• The predictive technology model in the late silicon era and beyond
• scientific article; zbMATH DE number 1690169
• Reliability assessment of networks-on-chip based on analytical models

zbMATH Keywords

microprocessor reliabilityNBTI frameworknegative bias temperature instabilityreliable systems

Mathematics Subject Classification ID

Computer system organization (68M99)

Cited In (2)

• NBTI-aware transient fault rate analysis method for logic circuit based on probability voltage transfer characteristics
• NBTI and power reduction using an input vector control and supply voltage assignment method

This page was built for publication: New-age: A negative bias temperature instability-estimation framework for microarchitectural components

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q839019)