Optimization of a logic circuit implementing a Moore automaton in CPLD basis

DOI10.1007/S10559-009-9141-1MaRDI QIDQ844376zbMATH OpenOpenAlexFDO

Authors L. A. Titarenko, S. A. Tsololo, Alexander Barkalov

Publication date 19 January 2010

Published in Cybernetics and Systems Analysis (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s10559-009-9141-1

zbMATH Keywords

synthesispseudoequivalent stateMoore automatonCPLDlogic circuitPAL macrocell

Mathematics Subject Classification ID

Formal languages and automata (68Q45)

Recommendations

• Principles of logic optimization for a Moore microprogrammed automaton
• On digital circuit optimization using automata equations
• An algebraic technique for generating optimal CMOS circuitry in linear time
• Optimization of multiple-output exclusive-or logic circuits
• scientific article; zbMATH DE number 1014082
• Optimization of circuits of compositional microprogram control units implemented on FPGA

Cites work

• scientific article; zbMATH DE number 603377 (Why is no real title available?)
• scientific article; zbMATH DE number 1941081 (Why is no real title available?)
• Principles of logic optimization for a Moore microprogrammed automaton

Cited in

(5)

• Logic synthesis for VLSI-based combined finite state machines. Synthesis targeting ASICs, CPLDs and FPGAs
• Principles of logic optimization for a Moore microprogrammed automaton
• Joint use of methods of structural decomposition for optimizing the circuit of Moore FSM
• Optimizing the combined automation scheme in the ASIS basis
• On digital circuit optimization using automata equations

This page was built for publication: Optimization of a logic circuit implementing a Moore automaton in CPLD basis

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q844376)