Optimization of a logic circuit implementing a Moore automaton in CPLD basis

DOI10.1007/S10559-009-9141-1zbMATH Open1185.68379OpenAlexW2071063605MaRDI QIDQ844376FDOQ844376

Authors: L. A. Titarenko, S. A. Tsololo, Alexander Barkalov 

Publication date: 19 January 2010

Published in: Cybernetics and Systems Analysis (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10559-009-9141-1

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zbMATH Keywords

synthesispseudoequivalent stateMoore automatonCPLDlogic circuitPAL macrocell

Mathematics Subject Classification ID

Formal languages and automata (68Q45)

Cites Work

• Principles of logic optimization for a Moore microprogrammed automaton
• Title not available (Why is that?)
• Title not available (Why is that?)

Cited In (5)

• Optimizing the combined automation scheme in the ASIS basis
• On digital circuit optimization using automata equations
• Joint use of methods of structural decomposition for optimizing the circuit of Moore FSM
• Principles of logic optimization for a Moore microprogrammed automaton
• Logic synthesis for VLSI-based combined finite state machines. Synthesis targeting ASICs, CPLDs and FPGAs

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