A generic algorithm for one-dimensional homotopic compaction
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DOI10.1007/BF01759037zbMATH Open0703.68047MaRDI QIDQ916367FDOQ916367
Publication date: 1991
Published in: Algorithmica (Search for Journal in Brave)
Recommendations
VLSI layoutconstraint solvingriver routingcut conditionshomotopic compactionhomotopic routingjog insertionknock-knee routingroutabilitywire length minimizationwire routing
Cites Work
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- A mixed-integer linear programming problem which is efficiently solvable
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- Parity conditions in homotopic knock-knee routing
- On the solution of inequality systems relevant to IC-layout
- A Linear-Time Algorithm for the Homotopic Routing Problem in Grid Graphs
Cited In (12)
- Title not available (Why is that?)
- Title not available (Why is that?)
- Title not available (Why is that?)
- New algorithms based on a multiple storage quadtree for hierarchical compaction of VLSI mask layout
- A framework for 1-D compaction with forbidden region avoidance
- On counting pairs of intersecting segments and off-line triangle range searching
- Fast algorithms for one-dimensionsal compaction with jog insertion
- Title not available (Why is that?)
- Minimizing total wire length during 1-dimensional compaction
- Parity conditions in homotopic knock-knee routing
- Single-layer cylindrical compaction
- A faster one-dimensional topological compaction algorithm with jog insertion
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