Dual-thread speculation: A simple approach to uncover thread-level parallelism on a simultaneous multithreaded processor
DOI10.1007/S10766-007-0064-ZzbMATH Open1147.68420OpenAlexW1964490256MaRDI QIDQ934722FDOQ934722
Authors: Fredrik Warg, Per Stenström
Publication date: 30 July 2008
Published in: International Journal of Parallel Programming (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10766-007-0064-z
Recommendations
Computer architectureChip multiprocessorsSimultaneous multithreadingThread-level parallelismThread-level speculation
Cites Work
Cited In (10)
- Adaptive dynamic thread scheduling for simultaneous multithreaded architectures with a detector thread
- The need for fast communication in hardware-based speculative chip multiprocessors
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- A case for chip multiprocessors based on the data-driven multithreading model
- Speculative parallelization of sequential loops on multicores
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- Applying Formal Methods: Testing, Performance, and M/E-Commerce
- Dual-thread speculation: A simple approach to uncover thread-level parallelism on a simultaneous multithreaded processor
- The impact of speculative execution on SMT processors
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