Models and formal verification of multiprocessor system-on-chips
DOI10.1016/J.JLAP.2008.05.002zbMATH Open1151.68339OpenAlexW2047516333WikidataQ54483958 ScholiaQ54483958MaRDI QIDQ953526FDOQ953526
Authors: Michael R. Hansen, Jan Madsen, Aske W. Brekling 
Publication date: 6 November 2008
Published in: The Journal of Logic and Algebraic Programming (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.jlap.2008.05.002
Recommendations
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Cites Work
- Uppaal in a nutshell
- Formal Methods for the Design of Real-Time Systems
- A theory of timed automata
- Bounds on Multiprocessing Timing Anomalies
- Title not available (Why is that?)
- Title not available (Why is that?)
- Formal Modeling and Analysis of Timed Systems
- Scheduling with timed automata
- Title not available (Why is that?)
- Verification of the legOS scheduler using Uppaal
Cited In (7)
- A hybrid performance analysis technique for distributed real-time embedded systems
- Title not available (Why is that?)
- Research and Development of an Algorithm for the Response Time Estimation in Multiprocessor Systems Under the Interval Uncertainty of the Tasks Execution Times
- Specification and verification of a MPI implementation for a MP-SoC
- A formal method for determining the state of processors in a multiprocessor system under testing
- Model Checking Real-Time Systems
- Formal verification and quantitative metrics of MPSoC data dynamics
Uses Software
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