An efficient RNS parity checker for moduli set \2ⁿ - 1, 2ⁿ + 1, 2²ⁿ + 1\ and its applications

DOI10.1007/S11432-008-0097-YzbMATH Open1151.68055OpenAlexW1974601904MaRDI QIDQ954477FDOQ954477

Authors: Shang Ma, Jianhao Hu, Lin Zhang, Xiang Ling 

Publication date: 10 November 2008

Published in: Science in China. Series F (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11432-008-0097-y

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zbMATH Keywords

VLSIRNSsign determinationoverflow detectionnumber comparisonparity check

Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cites Work

• A high-speed residue-to-binary converter for three-moduli \((2^k, 2^k -1, 2^{k-1} -1)\) RNS and a scheme for its VLSI implementation
• A study of the residue-to-binary converters for the three-moduli sets
• The Basis for Implementation of Ad idive Operations in the Residue Number System
• Binary Logic for Residue Arithmetic Using Magnitude Index

Cited In (3)

• Efficient CRT-based residue-to-binary converter for the arbitrary moduli set
• An efficient parity detection technique using the two-moduli set \(\{2^{h} - 1, 2^{h} + 1\}\)
• An improved Chen's parity detection technique for the two-moduli set

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