Realization of ternary sigma-delta modulated arithmetic processing modules

DOI10.1155/2009/574627zbMATH Open1184.94197OpenAlexW2088495138WikidataQ59249003 ScholiaQ59249003MaRDI QIDQ965293FDOQ965293

Authors: Amin Z. Sadik, Peter J. O'Shea 

Publication date: 24 April 2010

Published in: EURASIP Journal on Advances in Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1155/2009/574627

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Mathematics Subject Classification ID

Modulation and demodulation in information and communication theory (94A14)

Cites Work

• Oversampled Sigma-Delta Modulation
• Description of limit cycles in sigma-delta modulators

Cited In (6)

• Performance evaluation of a third-order LADF sigma-delta \((\varSigma -\varDelta )\) modulator via FPGA implementation
• Efficient realization of sigma-delta (\(\Sigma\)-\(\Delta\)) Kalman lowpass filter in hardware using FPGA
• Efficient realization of sigma-delta \(\Sigma\)-\(\Delta\) Kalman lowpass filter in hardware using FPGA
• Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part II: Multiplication and Algebraic Functions
• Nonlinear arithmetic operations on the delta sigma pulse stream
• Description of a 2-bit adaptive sigma-delta modulation system with minimized idle tones

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