Performance evaluation of a third-order LADF sigma-delta ( - ) modulator via FPGA implementation

DOI10.1016/J.SIGPRO.2006.05.010zbMATH Open1186.94031OpenAlexW2053114669MaRDI QIDQ970642FDOQ970642

S. S. Abeysekera, Charayaphan Charoensak

Publication date: 19 May 2010

Published in: Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.sigpro.2006.05.010

zbMATH Keywords

FPGALADFsigma-delta modulators

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

Cited In (1)

• Realization of ternary sigma-delta modulated arithmetic processing modules

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