Parallel implementation of wavelet-based image denoising on programmable PC-grade graphics hardware
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Publication:985586
DOI10.1016/j.sigpro.2009.06.019zbMath1194.94142MaRDI QIDQ985586
Publication date: 6 August 2010
Published in: Signal Processing (Search for Journal in Brave)
Full work available at URL: http://eprints.hud.ac.uk/id/eprint/3374/1/XuSIGPRO-D-08-008791.pdf
discrete wavelet transform; image denoising; general-purpose computing on graphics processing unit; graphics accelerator
94A12: Signal theory (characterization, reconstruction, filtering, etc.)
Uses Software
Cites Work
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- Block thresholding for density estimation: local and global adaptivity
- FPGA-based lifting wavelet processor for real-time signal detection
- Risk bounds for model selection via penalization
- Nonlinear wavelet thresholding: a recursive method to determine the optimal denoising threshold
- Minimax estimation via wavelet shrinkage
- Adapting to Unknown Smoothness via Wavelet Shrinkage
- The Lifting Scheme: A Construction of Second Generation Wavelets
- VLSI architectures for the discrete wavelet transform