Parallel implementation of wavelet-based image denoising on programmable PC-grade graphics hardware
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Publication:985586
DOI10.1016/J.SIGPRO.2009.06.019zbMATH Open1194.94142OpenAlexW2036622375MaRDI QIDQ985586FDOQ985586
Authors: Yang Su, Zhi-Jie Xu
Publication date: 6 August 2010
Published in: Signal Processing (Search for Journal in Brave)
Full work available at URL: http://eprints.hud.ac.uk/id/eprint/3374/1/XuSIGPRO-D-08-008791.pdf
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- FPGA-based lifting wavelet processor for real-time signal detection
- VLSI architectures for the discrete wavelet transform
- Block thresholding for density estimation: local and global adaptivity
- Nonlinear wavelet thresholding: a recursive method to determine the optimal denoising threshold
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