Rewrite based hardware verification with ReDuX

MaRDI QIDQ2702606zbMATH OpenFDO

Authors Reinhard Bündgen

Publication date 12 March 2001

zbMATH Keywords

ReDuXsynchronous circuit designs

Mathematics Subject Classification ID

Recommendations

• Rewriting environment for arithmetic circuit verification
• scientific article; zbMATH DE number 194777
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• The notion of proof in hardware verification
• Model checking: a hardware design perspective

Cited in

(1)

• Applying ELAN strategies in simulating processors over simple architectures

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