Semantics and Verification of a Language for Modelling Hardware Architectures

DOI10.1007/978-3-540-75221-9_13MaRDI QIDQ3526936zbMATH OpenOpenAlexFDO

Authors Michael R. Hansen, Jan Madsen, Aske W. Brekling

Publication date 25 September 2008

Published in Formal Methods and Hybrid Real-Time Systems (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-540-75221-9_13

zbMATH Keywords

hardware descriptionsmodel-checkingsemanticsverification

Mathematics Subject Classification ID

Semantics in the theory of computing (68Q55) Specification and verification (program logics, model checking, etc.) (68Q60)

Recommendations

• scientific article; zbMATH DE number 868111
• scientific article; zbMATH DE number 139804
• scientific article; zbMATH DE number 868112
• An algebraic approach to the VERILOG programming.
• scientific article; zbMATH DE number 1260557

Cited in

(13)

• On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP
• SIMD language design using prescriptive semantics
• Modeling multi-rate DSP specification semantics for formal transformational design in HOL
• Theoretical and practical approaches to the denotational semantics for MDESL based on UTP
• Model-based verification, optimization, synthesis and performance evaluation of real-time systems
• Model Checking Real-Time Systems
• scientific article; zbMATH DE number 3848604 (Why is no real title available?)
• scientific article; zbMATH DE number 139816 (Why is no real title available?)
• scientific article; zbMATH DE number 139817 (Why is no real title available?)
• Relating Event and Trace Semantics of Hardware Description Languages
• Languages for formalizing, visualizing and verifying software architectures
• scientific article; zbMATH DE number 2079820 (Why is no real title available?)
• Correct Hardware Design and Verification Methods

Describes a project that uses

Uses Software

• GEZEL
• Uppaal

This page was built for publication: Semantics and Verification of a Language for Modelling Hardware Architectures

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3526936)