Uppaal
From MaRDI portal
Cited in
(only showing first 100 items - show all)- Formal modeling, performance estimation, and model checking of wireless sensor network algorithms in Real-Time Maude
- Refinement and verification in component-based model-driven design
- M-nets: a survey
- Robust safety of timed automata
- Timed verification of the generic architecture of a memory circuit using parametric timed automata
- Investigating the usability of real-time scheduling theory with the Cheddar project
- Hybrid systems: From verification to falsification by combining motion planning and discrete search
- Automatic symmetry detection for Promela
- Performance analysis and functional verification of the stop-and-wait protocol in HOL
- A quadratic-time DBM-based successor algorithm for checking timed automata
- Automatic verification of a lip-synchronisation protocol using UPPAAL
- Event-clock automata: a determinizable class of timed automata
- Alpaga
- CLAN
- CVPP
- IMITATOR
- Marathon 2
- ObjectCheck
- pyModelChecking
- iRankFinder
- Romeo
- SENAC
- SIGREF
- TAPAAL
- TopSpin
- Omola
- PRISM
- A compared study of two correctness proofs for the standardized algorithm of ABR conformance
- A Ravenscar-compliant run-time kernel for safety-critical systems
- How to verify a Safe real-time system: The application of model checking and timed automata to the production cell case study
- Desco
- Approximating labelled Markov processes
- Lutess
- The power of reachability testing for timed automata
- Kronos
- Generalized discrete timed automata: Decidable approximations for safety verification.
- Pushdown timed automata: A binary reachability characterization and safety verification.
- Probabilistic model checking of deadline properties in the IEEE 1394 fireWire root contention protocol
- False loop detection in the IEEE 1394 tree identify phase
- Rabbit
- VINAS-P
- TREX
- TAXYS
- Moby/DC
- TIMES
- VEST
- JTorX
- Formal approaches to software testing. Third international workshop on formal approaches to testing of software, FATES 2003, Montreal, Quebec, Canada, October 6th, 2003. Revised papers
- mCRL2
- Dynamic partitioning in linear relation analysis: application to the verification of reactive systems
- MoDeST
- Symbolic verification and analysis of discrete timed systems
- GreatSPN 1.7
- Uppaal2k
- Compact data structures and state-space reduction for model-checking real-time systems
- Checking temporal duration properties of timed automata.
- Ada95
- Scicos
- HySAT
- StonyCam
- VerICS
- TinyOS
- LARCH
- BISIMULATOR
- M-TREE
- ECDAR
- ASTRAL
- SIGNAL
- AGATHA
- POOSL
- LOTOS
- HOL/SPIN
- MOTOR
- E-LOTOS
- AVISPA
- TINA
- Formal techniques in real-time and fault-tolerant systems. 6th international symposium, FTRTFT 2000, Pune, India, September 20--22, 2000. Proceedings
- IF-2.0
- Deductive verification of real-time systems using STeP
- PLC-automata: A new class of implementable real-time automata
- TCOZ
- SPIN
- POEM
- PVS
- Automatic verification of real-time systems with discrete probability distributions.
- Specification of real-time and hybrid systems in rewriting logic
- Möbius
- PHAVer
- HyTech
- Maria
- MRMC
- DiVinE
- NuSMV
- FLATA
- Timed-pNets: a communication behavioural semantic model for distributed systems
- GEZEL
- RSOLVER
- PetriNets
- LoLA
- Event algebra for transition systems composition application to timed automata
This page was built for software: Uppaal
