Uppaal2k
From MaRDI portal
Cited in
(51)- Kronos
- IEEE 1394 tree identify protocol: Introduction to the case study
- Verifying the IEEE 1394 fireWire tree identify protocol with SMV
- But what if I don't want to wait forever?
- Probabilistic model checking of deadline properties in the IEEE 1394 fireWire root contention protocol
- False loop detection in the IEEE 1394 tree identify phase
- Fun with fireWire: A comparative study of formal verification methods applied to the IEEE 1394 root contention protocol
- Rabbit
- TREX
- TAXYS
- DiVer
- VerICS
- MOTOR
- E-LOTOS
- SHARPE
- HyTech
- Uppaal
- Linear parametric model checking of timed automata
- Viptos
- Sumatra
- Symbolic model checking for probabilistic timed automata
- Schedulability of asynchronous real-time concurrent objects
- Advances in verification of time Petri nets and timed automata. A temporal logic approach.
- Almost ASAP semantics: from timed models to timed implementations
- Analysis of scheduling behaviour using generic timed automata
- A survey of formal methods applied to leader election in IEEE 1394
- Analyzing real-time systems: Theory and tools
- A tool for the syntactic detection of Zeno-timelocks in timed automata
- Runtime monitoring of contract regulated web services
- Memory arbiter synthesis and verification for a radar memory interface card
- TCTL inevitability analysis of dense-time systems
- Design and Verification of Fault-Tolerant Components
- AN INVERSE METHOD FOR PARAMETRIC TIMED AUTOMATA
- UPPAAL CORA
- scientific article; zbMATH DE number 1953031 (Why is no real title available?)
- Modeling and verification of hybrid dynamic systems using multisingular hybrid Petri nets
- scientific article; zbMATH DE number 2090703 (Why is no real title available?)
- scientific article; zbMATH DE number 2090709 (Why is no real title available?)
- Compositional schedulability analysis of real-time actor-based systems
- Computer Aided Verification
- Slicing of timed automata with discrete data
- Automated Technology for Verification and Analysis
- Correct Hardware Design and Verification Methods
- scientific article; zbMATH DE number 5499354 (Why is no real title available?)
- SAT-based unbounded model checking of timed automata
- Numerical coverage estimation for the symbolic simulation of real-time systems
- A timed verification of the IEEE 1394 Leader election protocol
- Verifying distributed real-time properties of embedded systems via graph transformations and model checking
- Performance analysis of probabilistic timed automata using digital clocks
- Modelling and analysis of hybrid supervisory systems. A Petri net approach.
- When are timed automata weakly timed bisimilar to time Petri nets?
This page was built for software: Uppaal2k
