Checkfence
From MaRDI portal
Software:21918
swMATH9939MaRDI QIDQ21918FDOQ21918
Author name not available (Why is that?)
Cited In (18)
- Sound and Complete Monitoring of Sequential Consistency for Relaxed Memory Models
- Software Verification for Weak Memory via Program Transformation
- Effective Program Verification for Relaxed Memory Models
- Software Transactional Memory on Relaxed Memory Models
- Stateless model checking for TSO and PSO
- Deciding Robustness against Total Store Ordering
- Symbolic predictive analysis for concurrent programs
- Exploiting step semantics for efficient bounded model checking of asynchronous systems
- Formalising Java’s Data Race Free Guarantee
- Model Checking Concurrent Programs
- Memory model sensitive bytecode verification
- Verification of STM on relaxed memory models
- Partition consistency. A case study in modeling systems with weak memory consistency and proving correctness of their implementations
- On automation in the verification of software barriers: experience report
- A High-Level Semantics for Program Execution under Total Store Order Memory
- Model checking transactional memories
- Verification of Concurrent Programs on Weak Memory Models
- Counter-Example Guided Fence Insertion under TSO
This page was built for software: Checkfence
