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swMATH12794MaRDI QIDQ24718FDOQ24718
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Cited In (10)
- Mostly automated formal verification of loop dependencies with applications to distributed stencil algorithms
- Checking data-race freedom of GPU kernels, compositionally
- Formal verification of parallel prefix sum and stream compaction algorithms in CUDA
- Automated verification of functional correctness of race-free GPU programs
- Mostly Automated Formal Verification of Loop Dependencies with Applications to Distributed Stencil Algorithms
- Automated verification of the parallel Bellman-Ford algorithm
- A Hoare Logic for SIMT Programs
- Interleaving and Lock-Step Semantics for Analysis and Verification of GPU Kernels
- A sound and complete abstraction for reasoning about parallel prefix sums
- A Hoare Logic for GPU Kernels
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