The following pages link to Eduard Cerny (Q1391938):
Displayed 18 items.
- (Q1195307) (redirect page) (← links)
- Letter to the editors: Algorithm for the graph-partitioning problem using a problem transformation method (Q1195308) (← links)
- Solving linear, min and max constraint systems using CLP based on relational interval arithmetic (Q1391939) (← links)
- On the non-termination of MDG-based abstract state enumeration (Q1399962) (← links)
- Built-In Testing of One-Dimensional Unilateral Iterative Arrays (Q3321988) (← links)
- (Q3887363) (← links)
- (Q4028135) (← links)
- Comments on "Equational Logic (Q4093412) (← links)
- An Approach to Unified Methodology of Combinational Switching Circuits (Q4141113) (← links)
- Controllability and Fault Observability in Modular Combinational Circuits (Q4165291) (← links)
- (Q4171974) (← links)
- Synthesis of Minimal Binary Decision Trees (Q4198637) (← links)
- (Q4225040) (← links)
- (Q4255568) (← links)
- Fault tolerance in a class of sorting networks (Q4419734) (← links)
- A Computer Algorithm for the Synthesis of Memoryless Logic Circuits (Q4767230) (← links)
- Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs (MDGs) (Q4828448) (← links)
- (Q5754537) (← links)